1μm600v hvic
overview
公司提供的1μm 600v hvic高压浮栅工艺， 拥有200v/600v两个档位的nldmos/高压隔离岛。公司的高压互联自屏蔽技术荣获两项发明专利。为电机驱动、白色家电（ipm模块）、大功率llc、无人机等应用提供了很好的pg电子官方的解决方案。
key features
- cost effective mask layer，competitive rdson and bvdss performance
- foundry compatible 5v cmos，20v mv-ldmos, 200v/600v hvmos island
- rich options included parasitic zener/jfet
- pdk and industry standard cad tools are supported
- supporting thick metal layer
application
-motor driver
-ipm
-llc
-unmanned aerial vehicle
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1.0μm 60v/120v hvic
overview
公司提供的1.0μm 60v/120v hvic工艺， 拥有高可靠性的ldmos以及精简的光刻层次，提供60v/120v两个档位的n/pldmos以及隔离岛。为手持电动工具、平衡车、无人机等应用提供了很好的pg电子官方的解决方案。
key features
- cost effective mask layer，competitive rdson and bvdss performance
- foundry compatible 5v cmos，12v mv-ldmos, 60v/120v hv-ldmos and island.
- rich options included parasitic zener/jfet
- pdk and industry standard cad tools are supported
- supporting thick metal layer
application
- power tools
- ninebot
-unmanned aerial vehicle
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1.0μm 25v 40v hv
overview
1.0μm 25v 40v hv是公司的标准高压工艺平台之一。是以较少光刻层数实现的经济高压工艺，工艺特征为1.0μm 线宽，单层多晶，双层金属，应用于数模混合的高压产品，工艺平台提供常规及隔离的5v低压cmos、25v或40v高压cmos器件，以及多晶高阻和齐纳二极管等器件。
为了节省芯片面积，工艺提供1.0μm 前端0.5μm后端设计规则。
key features
- 5v logic layout & performance compatible with the industry standard
- 1.0 micron front-end, 1.0 micron or 0.5 micron back-end design rule
- epi process for isolated devices
- modular concept (hr/ zener / bjt / special require)
- vgs/vds=5v/25 or vgs/vds=5v/40v，vgs/vds=25v/25 or vgs/vds=40v/40v hvcmos
- high value poly resistor
- i/o cell library with 2kv hbm esd protection levels
application
- lcd driver/led driver
- power management product
- battery protection ic